Power supply noise and related issues have become critical for designs at 90nm and below due to the combination of several factors. Timing slowdown and functional failures are becoming common in these ...

Automatic mesh generation, recognized as the "Holy Grail" of Computational Fluid Dynamics (CFD), was highlighted as a critical objective in the NASA ...

Set-Top-Box(STB) SoC designs are extremely complex with multi-million standard cells, higher core utilization of around 70-80 %, and multiple clock domains including high and low frequencies. An ...

The Power Delivery Network (PDN) is the backbone of ASIC design. It is used to supply clean power to active circuits in the IC. Voltage drop on the power rails can result in degraded performance, ...

A number of technical challenges have come together to make power grid design one of the most challenging design issues today. Creating the right power grid is a growing problem in leading-edge chips.

Forbes contributors publish independent expert analyses and insights. I write about green energy tech that will change your life. Have you ever noticed power lines sagging lower on a hot summer day?

A recent trend confusing two quite different terms has had a huge negative impact on the yield, reliability, and manufacturability of DSM (deep-submicron) and subwavelength semiconductor designs. This ...