Chinese chip maker Innosilicon has announced its new LPDDR6/5X memory controller IP provided to its first customers in China, ...

For one thing, this SSD controller is geared towards an "active power efficiency measurement of under 2.3 W." Phison then ...

This isn't about memory chips, but implementable logic blocks for chip vendors, and it's a significant milestone for the ...

As artificial intelligence (AI), machine learning (ML), cloud computing, and data analytics take on a greater role, traditional processors are starting to see the limits of processing efficiency from ...

SANTA CLARA, CA, U.S. – September 19, 2023 – Astera Labs today said its Leo Memory Connectivity Platform is the industry’s first Compute Express Link (CXL) memory controller that increases server ...

SAN JOSE, Calif.--(BUSINESS WIRE)-- Cadence (Nasdaq: CDNS) today announced the tapeout of the industry’s first LPDDR6/5X memory IP system solution optimized to operate at 14.4Gbps, up to 50% faster ...

Powervation Ltd. announces sampling of PV3201, a new dual phase digital DC/DC controller with SVID interface. PV3201 complies with the Serial VID (SVID) communications protocol of Intel's VR12/VR12.5 ...

Michael Kanellos is editor at large at CNET News.com, where he covers hardware, research and development, start-ups and the tech industry overseas. If you want to know why Intel doesn't include a ...

The number of systems-on-a-chip (SoCs) that require an interface to off-chip memory is increasing. As a result, more and more designers are turning to double-data-rate (DDR) SDRAM interfaces such as ...