Hackaday

phase lock loop

The phase locked loop, or PLL, is a real workhorse of circuit design. It is a classic feedback loop where the phase of an oscillator is locked to the phase of a ...
Electronic Design

Integrated Phase Lock Loop Replaces Crystal Oscillators

The NB4N507A is a fully integrated phase lock loop (PLL) designed to replace expensive crystal oscillators for clock generation in a variety of consumer and networking applications. The IC generates a ...
Hackaday

Learn Something About Phase Locked Loops

The clever trick comes by dividing the output frequency. For example, a 100 MHz crystal oscillator is difficult to design. But taking a voltage-controlled oscillator at 100 MHz (nominal) and dividing ...
EDN

12A DC/DC regulator features phase-lock loop, output tracking

Milpitas, Calif.—Designed for rugged military and avionics applications, Linear Technology Corp.'s LTM4601AHVMPV is an encapsulated 12A switching µModule (micromodule) DC/DC regulator system featuring ...
Electronic Design

Phase-Noise Modeling, Simulation, and Propagation in Phase-Locked Loops (Part 3)

Some brief theory and typical measurements of phase noise. How to produce the lowest phase noise at a PLL output. A standard design procedure for a typical Type 2, second-order loop. As stated in ...
Design-Reuse

Low Power High Speed All Digital Phase Locked Loops

In this paper an All Digital phase locked loop is proposed. This PLL can accomplish faster phase lock. Additionally, the functions of frequency comparator and phase detector have been improved and are ...
EDN

FPGA-Based DPLL Approach Delivers Wide-Lock Range

While analog phase-lock loops (PLLs) still have a home in communication equipment, there is a clear shift in the sector toward implementing digital PLLs (DPLLs) in comm ASIC designs. For example, in ...