Design And Reuse

TES offers CAN Flexible Data-Rate Controller IP Core for System-on-Chip (SoC) Designs

TES Electronic Solutions GmbH adds to its IP portfolio a new VHDL-based CAN Flexible Data-Rate (FD) controller IP core. The IP is designed for System-on-Chip (SoC) implementations and can be ...
Design And Reuse

Creonic Releases Updated SDA OCT IP Core Supporting OCT 4.0 and Enhanced Synchronization

The updated SDA OCT IP Core now operates in a single clock domain, reducing design complexity and easing integration into FPGA-based systems. It adds flexible frame synchronization with configurable ...
EDN

System-on-chip (SoC) design is all about IP management

For most system-on-chip (SoC) designs, the most critical task is not RTL coding or even creating the chip architecture. Today, SoCs are designed primarily by assembling various silicon intellectual ...
EDN

RF transceiver IP core ready for Wi-Fi 7 SoCs

T2M IP, a supplier of IP cores and connectivity solutions, has announced the availability of a dual-band Wi-Fi 7 RF transceiver IP core with an integrated front-end module (FEM) from its partner. The ...
Electronic Design

Embracing Multicore and RISC-V Architectures in SoC Design

There’s been a significant shift toward RISC-V architectures in SoC design. This article highlights its impact on the semiconductor industry and role in fostering innovation and flexibility in ...